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Nordic Semiconductor /nrf51 /SPI0 /INTENCLR

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Interpret as INTENCLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Disabled)READY

READY=Disabled

Description

Interrupt enable clear register.

Fields

READY

Disable interrupt on READY event.

0 (Disabled): Interrupt disabled.

1 (Enabled): Interrupt enabled.

1 (Clear): Disable interrupt on write.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data